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| author | Jerome Brunet <jbrunet@baylibre.com> | 2019-02-12 14:23:25 +0100 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-23 11:19:09 +0200 |
| commit | b050a30016ee5577bdd3e64b243902f902450452 (patch) | |
| tree | 9106cdf8f45bb7f02ee1f0be3a5d851a080ec3e5 /configs/u200_defconfig | |
| parent | f9e605437e59706a591a65f26d6fd57ed3563e9b (diff) | |
| download | u-boot-b050a30016ee5577bdd3e64b243902f902450452.tar.gz u-boot-b050a30016ee5577bdd3e64b243902f902450452.tar.xz u-boot-b050a30016ee5577bdd3e64b243902f902450452.zip | |
boards: meson: add g12a u200
The Amlogic U200 board is based on the Amlogic S905D2 SoC
from the Amlogic G12A SoC family.
The board has the following specifications :
- Amlogic S905D2 ARM Cortex-A53 quad-core SoC
- XGB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
- MIPI DSI Connector
- Audio HAT Connector
- PCI-E M.2 Connector
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'configs/u200_defconfig')
| -rw-r--r-- | configs/u200_defconfig | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/configs/u200_defconfig b/configs/u200_defconfig new file mode 100644 index 0000000000..c351913f0e --- /dev/null +++ b/configs/u200_defconfig @@ -0,0 +1,40 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" u200" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ADDR=8 +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y |