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| author | Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> | 2019-04-09 21:02:05 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-04-25 00:00:49 +0200 |
| commit | aef44283ac8e4d150f9faa87e16d9b962fc7ef5d (patch) | |
| tree | 689ec5830fb894162c5e4ccfc76626b36d516aa9 /configs/socfpga_vining_fpga_defconfig | |
| parent | 4399e48deb55a5786515e089fe9f0aa6e0ce5d6a (diff) | |
| download | u-boot-aef44283ac8e4d150f9faa87e16d9b962fc7ef5d.tar.gz u-boot-aef44283ac8e4d150f9faa87e16d9b962fc7ef5d.tar.xz u-boot-aef44283ac8e4d150f9faa87e16d9b962fc7ef5d.zip | |
arm: socfpga: imply/default common config options
This commit moves common config options used in all socfpga boards
to select/imply in Kconfig. This both cleans up the defconfig files
as well as makes future changes easier.
Options implied/defaulted for all sub-arches:
- SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS
Options implied/defaulted for implied for A10 & gen5:
- FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE
Options implied/defaulted for gen5:
- SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'configs/socfpga_vining_fpga_defconfig')
| -rw-r--r-- | configs/socfpga_vining_fpga_defconfig | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 3eba09dcb1..7b47b111b7 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -19,8 +14,6 @@ CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -45,12 +38,10 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_LED_STATUS=y @@ -90,4 +81,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y |