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| author | Tom Rini <trini@konsulko.com> | 2019-05-26 14:45:25 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-26 14:45:25 -0400 |
| commit | 344a0e4367d0820b8eb2ea4a90132433e038095f (patch) | |
| tree | bf58156bdb467305dac74f175f5c81ef615d49ac /configs/kmtegr1_defconfig | |
| parent | cc1e98b559e46630c3421a7762d02a58e5480926 (diff) | |
| download | u-boot-344a0e4367d0820b8eb2ea4a90132433e038095f.tar.gz u-boot-344a0e4367d0820b8eb2ea4a90132433e038095f.tar.xz u-boot-344a0e4367d0820b8eb2ea4a90132433e038095f.zip | |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/kmtegr1_defconfig')
| -rw-r--r-- | configs/kmtegr1_defconfig | 62 |
1 files changed, 28 insertions, 34 deletions
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 5035839f4f..14f7c2f8ce 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -1,5 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 +CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 CONFIG_SYS_CLK_FREQ=66000000 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y @@ -79,6 +80,31 @@ CONFIG_LBLAW3=y CONFIG_LBLAW3_BASE=0xB0000000 CONFIG_LBLAW3_NAME="APP2" CONFIG_LBLAW3_LENGTH_256_MBYTES=y +CONFIG_ELBC_BR0_OR0=y +CONFIG_BR0_OR0_NAME="FLASH" +CONFIG_BR0_OR0_BASE=0xF0000000 +CONFIG_BR0_PORTSIZE_16BIT=y +CONFIG_OR0_AM_256_MBYTES=y +CONFIG_OR0_SCY_5=y +CONFIG_OR0_CSNT_EARLIER=y +CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR0_TRLX_RELAXED=y +CONFIG_OR0_EAD_EXTRA=y +CONFIG_ELBC_BR1_OR1=y +CONFIG_BR1_OR1_NAME="KMBEC_FPGA" +CONFIG_BR1_OR1_BASE=0xE8000000 +CONFIG_OR1_AM_128_MBYTES=y +CONFIG_OR1_SCY_2=y +CONFIG_OR1_CSNT_EARLIER=y +CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR1_TRLX_RELAXED=y +CONFIG_OR1_EAD_EXTRA=y +CONFIG_ELBC_BR3_OR3=y +CONFIG_BR3_OR3_NAME="APP2" +CONFIG_BR3_OR3_BASE=0xB0000000 +CONFIG_BR3_PORTSIZE_16BIT=y +CONFIG_OR3_AM_256_MBYTES=y +CONFIG_OR3_SCY_5=y CONFIG_HID0_FINAL_EMCP=y CONFIG_HID0_FINAL_ICE=y CONFIG_HID2_HBE=y @@ -86,6 +112,8 @@ CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y +CONFIG_LCRR_EADC_1=y +CONFIG_LCRR_CLKDIV_2=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" @@ -115,7 +143,6 @@ CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 -CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y @@ -129,36 +156,3 @@ CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_SYS_NS16550=y CONFIG_BCH=y CONFIG_OF_LIBFDT=y -CONFIG_ELBC_BR0_OR0=y -CONFIG_BR0_OR0_NAME="FLASH" -CONFIG_BR0_OR0_BASE=0xF0000000 -CONFIG_BR0_MACHINE_GPCM=y -CONFIG_BR0_PORTSIZE_16BIT=y -CONFIG_OR0_AM_256_MBYTES=y -CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR0_CSNT_EARLIER=y -CONFIG_OR0_EAD_EXTRA=y -CONFIG_OR0_SCY_5=y -CONFIG_OR0_TRLX_RELAXED=y -CONFIG_ELBC_BR1_OR1=y -CONFIG_BR1_OR1_NAME="KMBEC_FPGA" -CONFIG_BR1_OR1_BASE=0xE8000000 -CONFIG_BR1_MACHINE_GPCM=y -CONFIG_BR1_PORTSIZE_8BIT=y -CONFIG_OR1_AM_128_MBYTES=y -CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR1_CSNT_EARLIER=y -CONFIG_OR1_EAD_EXTRA=y -CONFIG_OR1_SCY_2=y -CONFIG_OR1_TRLX_RELAXED=y -CONFIG_ELBC_BR3_OR3=y -CONFIG_BR3_OR3_NAME="APP2" -CONFIG_BR3_OR3_BASE=0xB0000000 -CONFIG_BR3_MACHINE_GPCM=y -CONFIG_BR3_PORTSIZE_16BIT=y -CONFIG_OR3_AM_256_MBYTES=y -CONFIG_OR3_SCY_5=y -CONFIG_OR3_EHTR_NORMAL=y -CONFIG_LCRR_DBYP_PLL_BYPASSED=y -CONFIG_LCRR_EADC_1=y -CONFIG_LCRR_CLKDIV_2=y |