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| author | Mark Kettenis <kettenis@openbsd.org> | 2019-08-09 22:30:26 +0200 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2019-09-21 10:52:57 +0200 |
| commit | f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db (patch) | |
| tree | 9dffe4a70be8518456b17c2bf8d0112486cecb76 /configs/P4080DS_defconfig | |
| parent | d2a8271c88514f30c2fe00d2584401348f39c3d4 (diff) | |
| download | u-boot-f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db.tar.gz u-boot-f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db.tar.xz u-boot-f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db.zip | |
sunxi: video: HDMI: Fix LCD clock divider
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider. This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.
Fixes: 1feed358ed15 ("sunxi: video: HDMI: Fix clock setup")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Diffstat (limited to 'configs/P4080DS_defconfig')
0 files changed, 0 insertions, 0 deletions