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| author | Chris Packham <judge.packham@gmail.com> | 2019-02-18 10:30:52 +1300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2019-04-12 07:04:18 +0200 |
| commit | 8562e41464e06389ea4965d71a91753700985456 (patch) | |
| tree | 696d554f36fc3e253c86d7709d8055ebfb3e5b15 /configs/P1021RDB-PC_SPIFLASH_defconfig | |
| parent | 3c265bbe4d1c16f7c781c0f99df78c373c2fbd79 (diff) | |
| download | u-boot-8562e41464e06389ea4965d71a91753700985456.tar.gz u-boot-8562e41464e06389ea4965d71a91753700985456.tar.xz u-boot-8562e41464e06389ea4965d71a91753700985456.zip | |
watchdog: orion_wdt: support SPL usage
When run from the SPL the mvebu targets are using the hardware default
offset for the SoC peripherals. devfdt_get_addr_size_index() understands
how to deal with this via dm_get_translation_offset() so use this
instead of fdtdec_get_addr_size_auto_noparent().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'configs/P1021RDB-PC_SPIFLASH_defconfig')
0 files changed, 0 insertions, 0 deletions