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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2020-07-16 18:09:20 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-09-24 08:27:44 -0400 |
| commit | b1191fa8cafd5c0f897f4733caff39134ddbb100 (patch) | |
| tree | 0c3d210893e790271f058cdb09b5e10729a94489 /configs/P1020RDB-PD_defconfig | |
| parent | dfd4dfb289bb51b28edf33508c8b463e8ce48645 (diff) | |
| download | u-boot-b1191fa8cafd5c0f897f4733caff39134ddbb100.tar.gz u-boot-b1191fa8cafd5c0f897f4733caff39134ddbb100.tar.xz u-boot-b1191fa8cafd5c0f897f4733caff39134ddbb100.zip | |
configs: P1020RDB: Enable DM_ETH config
Enable the DM_ETH and DM_MDIO config.
On P1020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'configs/P1020RDB-PD_defconfig')
| -rw-r--r-- | configs/P1020RDB-PD_defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 3f07ca7d2f..0998e91324 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -51,6 +51,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -62,8 +63,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y |