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| author | Stefan Mavrodiev <stefan.mavrodiev@gmail.com> | 2016-10-29 14:34:07 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2016-10-30 11:38:04 +0100 |
| commit | 06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2 (patch) | |
| tree | d030cc20204e5cd6b1586fd598bf902b019f1705 /configs/A20-Olimex-SOM-EVB_defconfig | |
| parent | 6301e80ccfdf8b8daf921c67ffb5c5a17960f895 (diff) | |
| download | u-boot-06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2.tar.gz u-boot-06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2.tar.xz u-boot-06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2.zip | |
sunxi: Update DRAM clock for Olimex A20 boards
Originally dram clock was set to 480MHz, but this behaves
unstable. To improve stability the clock is reduced to 384MHz
Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'configs/A20-Olimex-SOM-EVB_defconfig')
| -rw-r--r-- | configs/A20-Olimex-SOM-EVB_defconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 7a14a7b9b2..3f4e90db4a 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN7I=y -CONFIG_DRAM_CLK=480 +CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC3_CD_PIN="PH0" CONFIG_MMC3_PINS="PH" |