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author | Stephen Warren <swarren@nvidia.com> | 2013-06-18 09:46:52 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2013-07-11 14:15:16 -0700 |
commit | d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e (patch) | |
tree | 9b47bc2529ebe5173636baadf945384a7d79e97b /board | |
parent | b46694df845d8e2f654a871c24849cc217d4b5d2 (diff) | |
download | u-boot-d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e.tar.gz u-boot-d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e.tar.xz u-boot-d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e.zip |
ARM: tegra: enable LCD panel on Ventana
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/nvidia/dts/tegra20-ventana.dts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts index e1a3d1ec91..1a526bab64 100644 --- a/board/nvidia/dts/tegra20-ventana.dts +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -16,6 +16,17 @@ reg = <0x00000000 0x40000000>; }; + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + serial@70006300 { clock-frequency = < 216000000 >; }; @@ -56,4 +67,25 @@ status = "okay"; bus-width = <8>; }; + + lcd_panel: panel { + clock = <72072000>; + xres = <1366>; + yres = <768>; + left-margin = <58>; + right-margin = <58>; + hsync-len = <58>; + lower-margin = <4>; + upper-margin = <4>; + vsync-len = <4>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ + nvidia,panel-timings = <0 0 200 0 0>; + }; }; |