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authorTom Rini <trini@konsulko.com>2017-12-18 12:23:27 -0500
committerTom Rini <trini@konsulko.com>2017-12-18 12:23:27 -0500
commit90d75d2efc376094b50d84de80e9cb8b3bcae032 (patch)
treea5bcce535313c824bca832b9b9ccbc7f870d35fa /board
parenta9e670d46f1916d6fb925244d5d4c9a48db8e26b (diff)
parent3e229a83bd4190f99731992d3a56983f29313899 (diff)
downloadu-boot-90d75d2efc376094b50d84de80e9cb8b3bcae032.tar.gz
u-boot-90d75d2efc376094b50d84de80e9cb8b3bcae032.tar.xz
u-boot-90d75d2efc376094b50d84de80e9cb8b3bcae032.zip
Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.01-rc2-v2 fpga: - Enable loading bitstream via fit image for !xilinx platforms zynq: - Fix SPL SD boot mode zynqmp: - Not not reset in panic - Do not use simple allocator because of fat changes - Various dt chagnes - modeboot variable setup - Fix fpga loading on automotive devices - Fix coverity issues test: - Fix env test for !hush case - Stephen's patch
Diffstat (limited to 'board')
-rw-r--r--board/xilinx/zynqmp/zynqmp.c23
1 files changed, 19 insertions, 4 deletions
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index f769db7e81..c198a4d920 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -260,10 +260,10 @@ int board_init(void)
if (current_el() != 3) {
static char version[ZYNQMP_VERSION_SIZE];
- strncat(version, "xczu", 4);
+ strncat(version, "zu", 2);
zynqmppl.name = strncat(version,
zynqmp_get_silicon_idcode_name(),
- ZYNQMP_VERSION_SIZE - 5);
+ ZYNQMP_VERSION_SIZE - 3);
printf("Chip ID:\t%s\n", zynqmppl.name);
fpga_init();
fpga_add(fpga_xilinx, &zynqmppl);
@@ -277,10 +277,13 @@ int board_early_init_r(void)
{
u32 val;
+ if (current_el() != 3)
+ return 0;
+
val = readl(&crlapb_base->timestamp_ref_ctrl);
val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
- if (current_el() == 3 && !val) {
+ if (!val) {
val = readl(&crlapb_base->timestamp_ref_ctrl);
val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
writel(val, &crlapb_base->timestamp_ref_ctrl);
@@ -343,13 +346,17 @@ int board_late_init(void)
u8 bootmode;
const char *mode;
char *new_targets;
+ int ret;
if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
debug("Saved variables - Skipping\n");
return 0;
}
- reg = readl(&crlapb_base->boot_mode);
+ ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
+ if (ret)
+ return -EINVAL;
+
if (reg >> BOOT_MODE_ALT_SHIFT)
reg >>= BOOT_MODE_ALT_SHIFT;
@@ -360,23 +367,28 @@ int board_late_init(void)
case USB_MODE:
puts("USB_MODE\n");
mode = "usb";
+ env_set("modeboot", "usb_dfu_spl");
break;
case JTAG_MODE:
puts("JTAG_MODE\n");
mode = "pxe dhcp";
+ env_set("modeboot", "jtagboot");
break;
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
mode = "qspi0";
puts("QSPI_MODE\n");
+ env_set("modeboot", "qspiboot");
break;
case EMMC_MODE:
puts("EMMC_MODE\n");
mode = "mmc0";
+ env_set("modeboot", "emmcboot");
break;
case SD_MODE:
puts("SD_MODE\n");
mode = "mmc0";
+ env_set("modeboot", "sdboot");
break;
case SD1_LSHFT_MODE:
puts("LVL_SHFT_");
@@ -385,13 +397,16 @@ int board_late_init(void)
puts("SD_MODE1\n");
#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
mode = "mmc1";
+ env_set("sdbootdev", "1");
#else
mode = "mmc0";
#endif
+ env_set("modeboot", "sdboot");
break;
case NAND_MODE:
puts("NAND_MODE\n");
mode = "nand0";
+ env_set("modeboot", "nandboot");
break;
default:
mode = "";