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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2020-05-25 12:19:49 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-07-07 16:01:23 +0200 |
| commit | 4fb46816c7e2defe01213c09742e06322a9e5f62 (patch) | |
| tree | 93af68fff777f284eb55fb4ddcdab359ec55662c /board | |
| parent | 4a87fea6de30b6e9c59a5abb6da1d0d84c984d15 (diff) | |
| download | u-boot-4fb46816c7e2defe01213c09742e06322a9e5f62.tar.gz u-boot-4fb46816c7e2defe01213c09742e06322a9e5f62.tar.xz u-boot-4fb46816c7e2defe01213c09742e06322a9e5f62.zip | |
board: stm32mp1: move the function board_debug_uart_init in spl.c
Move the debug function board_debug_uart_init in spl.c
as the debug_uart_init() function is called in arch_cpu_init()
only for SPL and remove the board.c file.
For TFABOOT, the UART TX pin configuration is done in TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/st/stm32mp1/Makefile | 2 | ||||
| -rw-r--r-- | board/st/stm32mp1/spl.c | 28 |
2 files changed, 28 insertions, 2 deletions
diff --git a/board/st/stm32mp1/Makefile b/board/st/stm32mp1/Makefile index 8188075b1a..65560df290 100644 --- a/board/st/stm32mp1/Makefile +++ b/board/st/stm32mp1/Makefile @@ -8,5 +8,3 @@ obj-y += spl.o else obj-y += stm32mp1.o endif - -obj-y += board.o diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index 9a83da8fd3..a6a41780c9 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -6,7 +6,10 @@ #include <config.h> #include <common.h> #include <init.h> +#include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <linux/bitops.h> +#include <linux/delay.h> #include "../common/stpmic1.h" /* board early initialisation in board_f: need to use global variable */ @@ -25,3 +28,28 @@ int board_early_init_f(void) return 0; } + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) + +#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) +#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) + + /* UART4 clock enable */ + setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); + +#define GPIOG_BASE 0x50008000 + /* GPIOG clock enable */ + writel(BIT(6), RCC_MP_AHB4ENSETR); + /* GPIO configuration for ST boards: Uart4 TX = G11 */ + writel(0xffbfffff, GPIOG_BASE + 0x00); + writel(0x00006000, GPIOG_BASE + 0x24); +#else + +#error("CONFIG_DEBUG_UART_BASE: not supported value") + +#endif +} +#endif |