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| author | dzu <dzu> | 2003-09-30 15:22:12 +0000 |
|---|---|---|
| committer | dzu <dzu> | 2003-09-30 15:22:12 +0000 |
| commit | bb65a312675f3cd1923a5cbe325ad9ca1703fc58 (patch) | |
| tree | f0ce2b1bf8440525818c1c74eaa54c97d3de431f /board/trab | |
| parent | 88a1bfa8b8a18f6c3838d9bffeb60b0921b4c877 (diff) | |
| download | u-boot-bb65a312675f3cd1923a5cbe325ad9ca1703fc58.tar.gz u-boot-bb65a312675f3cd1923a5cbe325ad9ca1703fc58.tar.xz u-boot-bb65a312675f3cd1923a5cbe325ad9ca1703fc58.zip | |
Improve SDRAM setup for TRAB boardLABEL_2003_10_01_1830
Diffstat (limited to 'board/trab')
| -rw-r--r-- | board/trab/memsetup.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/trab/memsetup.S b/board/trab/memsetup.S index 92f7d3ba1b..f59b0ac3c4 100644 --- a/board/trab/memsetup.S +++ b/board/trab/memsetup.S @@ -104,12 +104,12 @@ #ifndef CONFIG_RAM_16MB /* 32 MB RAM */ /* Bank6 */ #define B6_MT 0x3 /* SDRAM */ -#define B6_Trcd 0x1 /* 3clk */ +#define B6_Trcd 0x0 /* 2clk */ #define B6_SCAN 0x1 /* 9 bit */ /* Bank7 */ #define B7_MT 0x3 /* SDRAM */ -#define B7_Trcd 0x1 /* 3clk */ +#define B7_Trcd 0x0 /* 2clk */ #define B7_SCAN 0x1 /* 9 bit */ #else /* CONFIG_RAM_16MB = 16 MB RAM */ /* Bank6 */ @@ -178,5 +178,5 @@ SMRDATA: #else /* CONFIG_RAM_16MB = 16 MB RAM */ .word 0x17 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */ #endif /* CONFIG_RAM_16MB */ - .word 0x30 /* MRSR6, CL=3clk */ - .word 0x30 /* MRSR7 */ + .word 0x20 /* MRSR6, CL=2clk */ + .word 0x20 /* MRSR7 */ |