board: toradex: add apalis-imx8x 2gb wb it v1.1a module support

This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

1 files changed, 131 insertions, 0 deletions

diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c
new file mode 100644
index 0000000000..9f00f26cfe
--- /dev/null
+++ b/board/toradex/apalis-imx8x/apalis-imx8x.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Toradex
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <init.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8-pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sci/sci.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <env.h>
+#include <errno.h>
+#include <linux/libfdt.h>
+
+#include "../common/tdx-cfg-block.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
+			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
+			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
+			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+static iomux_cfg_t uart1_pads[] = {
+	SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+	imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+int board_early_init_f(void)
+{
+	sc_pm_clock_rate_t rate;
+	sc_err_t err = 0;
+
+	/*
+	 * This works around that having only UART3 up the baudrate is 1.2M
+	 * instead of 115.2k. Set UART0 clock root to 80 MHz
+	 */
+	rate = 80000000;
+	err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Set UART3 clock root to 80 MHz and enable it */
+	rate = SC_80MHZ;
+	err = sc_pm_setup_uart(SC_R_UART_1, rate);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	setup_iomux_uart();
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_DM_GPIO)
+static void board_gpio_init(void)
+{
+	/* TODO */
+}
+#else
+static inline void board_gpio_init(void) {}
+#endif
+
+#if IS_ENABLED(CONFIG_FEC_MXC)
+#include <miiphy.h>
+
+int board_phy_config(struct phy_device *phydev)
+{
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+
+	return 0;
+}
+#endif
+
+int checkboard(void)
+{
+	puts("Model: Toradex Apalis iMX8X\n");
+
+	build_info();
+	print_bootinfo();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	board_gpio_init();
+
+	return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+	/* TODO */
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	return ft_common_board_setup(blob, bd);
+}
+#endif
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+/* TODO move to common */
+	env_set("board_name", "Apalis iMX8X");
+#endif
+
+	return 0;
+}