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authorPatrick Wildt <patrick@blueri.se>2017-05-09 13:54:44 +0200
committerStefan Roese <sr@denx.de>2017-05-31 07:42:40 +0200
commitfb9765d5f9a1fbe7ca9c472cca9ceb561b02c1a1 (patch)
treed20330f8eeea0043bfb885df8942fbc4d93a80bc /board/solidrun
parent780f80cd0f7e357c9cfb474b71704c4204c025c0 (diff)
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arm: mvebu: clearfog: reset uSOM onboard 1512 phy
Use GPIO19 which is wired to the uSOM phy reset signal in order to reset the uSOM's 1512 Gigabit Ethernet phy. This GPIO is valid on ClearFog rev 2.1 and newer. Taken from SolidRun's specialised u-boot, see https://github.com/SolidRun/u-boot-armada38x/commit/f906e3df172e07ac82cdd87b278d7896949262ea Signed-off-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/solidrun')
-rw-r--r--board/solidrun/clearfog/clearfog.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 2773f5957e..3a8257cac3 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -131,8 +131,12 @@ int board_init(void)
/* Toggle GPIO41 to reset onboard switch and phy */
clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
+ /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */
+ clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
+ clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19));
mdelay(1);
setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
+ setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
mdelay(10);
/* Init I2C IO expanders */