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| author | Simon Glass <sjg@chromium.org> | 2019-04-01 13:38:38 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2019-05-24 10:13:12 -0700 |
| commit | f6ac3fab9ba2aa4b352fd8c8799c4b5091fc376c (patch) | |
| tree | 844838ef56aeb758772edfb8954c021fdf644ac3 /board/nvidia | |
| parent | 40920bdecc4e1b7096de6f546d7b5c2185554ba6 (diff) | |
| download | u-boot-f6ac3fab9ba2aa4b352fd8c8799c4b5091fc376c.tar.gz u-boot-f6ac3fab9ba2aa4b352fd8c8799c4b5091fc376c.tar.xz u-boot-f6ac3fab9ba2aa4b352fd8c8799c4b5091fc376c.zip | |
tegra: Correct tegra124 clock name
The first clock type appears to have and incorrect setting for out of the
mux outputs. It should be CLK_M, not OSC. Fix it and its only user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia')
| -rw-r--r-- | board/nvidia/nyan-big/nyan-big.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c index ff5c67de98..3c7bfead24 100644 --- a/board/nvidia/nyan-big/nyan-big.c +++ b/board/nvidia/nyan-big/nyan-big.c @@ -121,7 +121,7 @@ static void enable_required_clocks(void) int nvidia_board_init(void) { clock_start_periph_pll(PERIPH_ID_EXTPERIPH1, CLOCK_ID_OSC, 12000000); - clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_OSC, 1500000); + clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_CLK_M, 1500000); /* For external MAX98090 audio codec */ clock_external_output(1); |