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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/kup/kup4x/kup4x.c | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | u-boot-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.xz u-boot-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/kup/kup4x/kup4x.c')
| -rw-r--r-- | board/kup/kup4x/kup4x.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c index f07ef18703..c5b742dd72 100644 --- a/board/kup/kup4x/kup4x.c +++ b/board/kup/kup4x/kup4x.c @@ -114,7 +114,7 @@ const uint sdram_table[] = { int checkboard (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; volatile uchar *latch; uchar rev, mod; @@ -136,7 +136,7 @@ int checkboard (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size_b0 = 0; long int size_b1 = 0; @@ -151,7 +151,7 @@ phys_size_t initdram (int board_type) * with two SDRAM banks or four cycles every 31.2 us with one * bank. It will be adjusted after memory sizing. */ - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; memctl->memc_mar = 0x00000088; @@ -160,13 +160,13 @@ phys_size_t initdram (int board_type) * preliminary addresses - these have to be modified after the * SDRAM size has been determined. */ -/* memctl->memc_or1 = CFG_OR1_PRELIM; */ -/* memctl->memc_br1 = CFG_BR1_PRELIM; */ +/* memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; */ +/* memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; */ -/* memctl->memc_or2 = CFG_OR2_PRELIM; */ -/* memctl->memc_br2 = CFG_BR2_PRELIM; */ +/* memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; */ +/* memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; */ - memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ + memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ udelay (200); @@ -207,7 +207,7 @@ phys_size_t initdram (int board_type) size_b1 = 0x00800000; size_b2 = 0x00800000; size_b3 = 0x00800000; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; udelay (1000); memctl->memc_or1 = 0xFF800A00; memctl->memc_br1 = 0x00000081; @@ -222,7 +222,7 @@ phys_size_t initdram (int board_type) size_b1 = 0x01000000; size_b2 = 0x01000000; size_b3 = 0x01000000; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; udelay (1000); memctl->memc_or1 = 0xFF000A00; memctl->memc_br1 = 0x00000081; @@ -251,7 +251,7 @@ phys_size_t initdram (int board_type) static long int dram_size (long int mamr_value, long int *base, long int maxsize) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; volatile long int *addr; ulong cnt, val; @@ -294,7 +294,7 @@ static long int dram_size (long int mamr_value, long int *base, int misc_init_r (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; #ifdef CONFIG_IDE_LED /* Configure PA8 as output port */ |