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authorDirk Eibach <dirk.eibach@gdsys.cc>2014-07-03 09:28:23 +0200
committerTom Rini <trini@ti.com>2014-07-07 19:47:19 -0400
commitb415fec65f9867d851366b0bf17759497ff8b392 (patch)
tree5f29790fdcf72a4543e86752f75ff0cf20d637a5 /board/gdsys
parent3a990bfaeaf3d8388e1a62163e9361fe89ae3c79 (diff)
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board: gdsys: Enable scrambling on DP501
For proper displayport performance, scrambling has to be enabled, but is turned off on DP501 by default. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Diffstat (limited to 'board/gdsys')
-rw-r--r--board/gdsys/common/dp501.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 7958baeaaf..7eb15ed0ba 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -61,6 +61,7 @@ void dp501_powerup(u8 addr)
i2c_reg_write(addr, 0x71, 0x20); /* Enable Aux burst write */
dp501_setbits(addr, 0x78, 0x30); /* Disable HPD2 IRQ */
dp501_clrbits(addr, 0x2f, 0x40); /* Link FIFO reset selection */
+ dp501_clrbits(addr, 0x60, 0x20); /* Enable scrambling */
#ifdef CONFIG_SYS_DP501_VCAPCTRL0
i2c_reg_write(addr, 0x24, CONFIG_SYS_DP501_VCAPCTRL0);