powerpc/ppc4xx: Use generic accessor functions for gdsys FPGA

A set of accessor functions was added to be able to access not only
memory mapped FPGA in a generic way.

Thanks to Wolfgang Denk for getting this sorted properly.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>

1 files changed, 18 insertions, 16 deletions

diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index fa8961a351..2f8e306261 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -51,6 +51,8 @@ enum {
 	HWVER_110 = 1,
 };
 
+struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
+
 static inline void blank_string(int size)
 {
 	int i;
@@ -84,10 +86,9 @@ int misc_init_r(void)
 
 static void print_fpga_info(unsigned dev)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
-	u16 versions = in_le16(&fpga->versions);
-	u16 fpga_version = in_le16(&fpga->fpga_version);
-	u16 fpga_features = in_le16(&fpga->fpga_features);
+	u16 versions;
+	u16 fpga_version;
+	u16 fpga_features;
 	int fpga_state = get_fpga_state(dev);
 
 	unsigned unit_type;
@@ -95,6 +96,10 @@ static void print_fpga_info(unsigned dev)
 	unsigned feature_channels;
 	unsigned feature_expansion;
 
+	FPGA_GET_REG(dev, versions, &versions);
+	FPGA_GET_REG(dev, fpga_version, &fpga_version);
+	FPGA_GET_REG(dev, fpga_features, &fpga_features);
+
 	printf("FPGA%d: ", dev);
 	if (fpga_state & FPGA_STATE_PLATFORM)
 		printf("(legacy) ");
@@ -226,8 +231,6 @@ int last_stage_init(void)
 {
 	unsigned int k;
 	unsigned int fpga;
-	struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
-	struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1);
 	int failed = 0;
 	char str_phys[] = "Setup PHYs -";
 	char str_serdes[] = "Start SERDES blocks";
@@ -265,17 +268,16 @@ int last_stage_init(void)
 	/* take fpga serdes blocks out of reset */
 	puts(str_serdes);
 	udelay(500000);
-	out_le16(&fpga0->quad_serdes_reset, 0);
-	out_le16(&fpga1->quad_serdes_reset, 0);
+	FPGA_SET_REG(0, quad_serdes_reset, 0);
+	FPGA_SET_REG(1, quad_serdes_reset, 0);
 	blank_string(strlen(str_serdes));
 
 	/* take channels out of reset */
 	puts(str_channels);
 	udelay(500000);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_config_int = &(fpga ? fpga1 : fpga0)->ch0_config_int;
 		for (k = 0; k < 32; ++k)
-			out_le16(ch0_config_int + 4 * k, 0);
+			FPGA_SET_REG(fpga, ch[k].config_int, 0);
 	}
 	blank_string(strlen(str_channels));
 
@@ -283,16 +285,16 @@ int last_stage_init(void)
 	puts(str_locks);
 	udelay(500000);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_status_int = &(fpga ? fpga1 : fpga0)->ch0_status_int;
 		for (k = 0; k < 32; ++k) {
-			u16 status = in_le16(ch0_status_int + 4*k);
+			u16 status;
+			FPGA_GET_REG(k, ch[k].status_int, &status);
 			if (!(status & (1 << 4))) {
 				failed = 1;
 				printf("fpga %d channel %d: no serdes lock\n",
 					fpga, k);
 			}
 			/* reset events */
-			out_le16(ch0_status_int + 4*k, status);
+			FPGA_SET_REG(fpga, ch[k].status_int, 0);
 		}
 	}
 	blank_string(strlen(str_locks));
@@ -300,14 +302,14 @@ int last_stage_init(void)
 	/* verify hicb_status */
 	puts(str_hicb);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int;
 		for (k = 0; k < 32; ++k) {
-			u16 status = in_le16(ch0_hicb_status_int + 4*k);
+			u16 status;
+			FPGA_GET_REG(k, hicb_ch[k].status_int, &status);
 			if (status)
 				printf("fpga %d hicb %d: hicb status %04x\n",
 					fpga, k, status);
 			/* reset events */
-			out_le16(ch0_hicb_status_int + 4*k, status);
+			FPGA_SET_REG(fpga, hicb_ch[k].status_int, 0);
 		}
 	}
 	blank_string(strlen(str_hicb));