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| author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | 2018-12-27 04:37:59 +0000 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2019-01-17 13:16:22 -0800 |
| commit | 9570df03ee37f437f9ba3ddc25c8c6527a396992 (patch) | |
| tree | 1ad79c58d5685e937672aa983787e8dc6840cd70 /board/freescale/ls2080ardb/ls2080ardb.c | |
| parent | 1a12b4a0ac769f1a292d70e7e5f5fd6cd3781ec8 (diff) | |
| download | u-boot-9570df03ee37f437f9ba3ddc25c8c6527a396992.tar.gz u-boot-9570df03ee37f437f9ba3ddc25c8c6527a396992.tar.xz u-boot-9570df03ee37f437f9ba3ddc25c8c6527a396992.zip | |
armv8: ls2088ardb: Add TFABOOT support
TFABOOT support includes:
- ls2088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- remove EL3 specific erratas for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls2080ardb/ls2080ardb.c')
| -rw-r--r-- | board/freescale/ls2080ardb/ls2080ardb.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index cf91bc30fb..20e1fce0fc 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -346,12 +346,47 @@ void board_quiesce_devices(void) void fsl_fdt_fixup_flash(void *fdt) { int offset; +#ifdef CONFIG_TFABOOT + u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 val; +#endif /* * IFC and QSPI are muxed on board. * So disable IFC node in dts if QSPI is enabled or * disable QSPI node in dts in case QSPI is not enabled. */ +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); + bool disable_ifc = false; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + disable_ifc = false; + break; + case BOOT_SOURCE_QSPI_NOR: + disable_ifc = true; + break; + default: + val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); + if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) + disable_ifc = true; + break; + } + + if (disable_ifc) { + offset = fdt_path_offset(fdt, "/soc/ifc"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/ifc"); + } else { + offset = fdt_path_offset(fdt, "/soc/quadspi"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/quadspi"); + } + +#else #ifdef CONFIG_FSL_QSPI offset = fdt_path_offset(fdt, "/soc/ifc"); @@ -363,6 +398,8 @@ void fsl_fdt_fixup_flash(void *fdt) if (offset < 0) offset = fdt_path_offset(fdt, "/quadspi"); #endif +#endif + if (offset < 0) return; |