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| author | York Sun <york.sun@nxp.com> | 2017-03-06 09:02:34 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-03-14 08:44:03 -0700 |
| commit | 4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb (patch) | |
| tree | f1e66358f067240368b3b3b70514f7b8b3c49dc5 /board/freescale/ls1043aqds | |
| parent | 7f9b9f318ff152bd8d2e8b573708e2bdc088c1b1 (diff) | |
| download | u-boot-4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb.tar.gz u-boot-4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb.tar.xz u-boot-4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb.zip | |
armv8: layerscape: Update early MMU for DDR after initialization
In early MMU table, DDR has to be mapped as device memory to avoid
speculative access. After DDR is initialized, it needs to be updated
to normal memory to allow code execution. To simplify the code,
dram_init() is moved into a common file as a weak function.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1043aqds')
| -rw-r--r-- | board/freescale/ls1043aqds/ls1043aqds.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 8835a49bb5..6507c09143 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -11,6 +11,7 @@ #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/fdt.h> +#include <asm/arch/mmu.h> #include <asm/arch/soc.h> #include <ahci.h> #include <hwconfig.h> @@ -153,6 +154,10 @@ int dram_init(void) */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); gd->ram_size = initdram(0); +#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) + /* This will break-before-make MMU for DDR */ + update_early_mmu_table(); +#endif return 0; } |