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author | York Sun <yorksun@freescale.com> | 2013-09-30 09:22:09 -0700 |
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committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:43 -0800 |
commit | 5614e71b4956c579cd4419b958b33fa6316eaa92 (patch) | |
tree | f75d1d531814dbbe0ff9d65f28cc050a73a8f7de /board/freescale/bsc9131rdb | |
parent | ac6880782d8f369b7121488e8407ae6ddcf2b9ff (diff) | |
download | u-boot-5614e71b4956c579cd4419b958b33fa6316eaa92.tar.gz u-boot-5614e71b4956c579cd4419b958b33fa6316eaa92.tar.xz u-boot-5614e71b4956c579cd4419b958b33fa6316eaa92.zip |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/bsc9131rdb')
-rw-r--r-- | board/freescale/bsc9131rdb/ddr.c | 4 | ||||
-rw-r--r-- | board/freescale/bsc9131rdb/spl_minimal.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/board/freescale/bsc9131rdb/ddr.c b/board/freescale/bsc9131rdb/ddr.c index a9e92f2ae0..339c576256 100644 --- a/board/freescale/bsc9131rdb/ddr.c +++ b/board/freescale/bsc9131rdb/ddr.c @@ -8,8 +8,8 @@ #include <asm/mmu.h> #include <asm/immap_85xx.h> #include <asm/processor.h> -#include <asm/fsl_ddr_sdram.h> -#include <asm/fsl_ddr_dimm_params.h> +#include <fsl_ddr_sdram.h> +#include <fsl_ddr_dimm_params.h> #include <asm/io.h> #include <asm/fsl_law.h> diff --git a/board/freescale/bsc9131rdb/spl_minimal.c b/board/freescale/bsc9131rdb/spl_minimal.c index dd5ea95e33..974627163a 100644 --- a/board/freescale/bsc9131rdb/spl_minimal.c +++ b/board/freescale/bsc9131rdb/spl_minimal.c @@ -10,7 +10,7 @@ #include <nand.h> #include <linux/compiler.h> #include <asm/fsl_law.h> -#include <asm/fsl_ddr_sdram.h> +#include <fsl_ddr_sdram.h> #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; @@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; */ static void sdram_init(void) { - ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR; + ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR; __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds); __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config); |