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authorThierry Reding <thierry.reding@avionic-design.de>2012-11-23 00:58:51 +0000
committerTom Warren <twarren@nvidia.com>2013-01-16 13:40:07 -0700
commite1abca51b7f479828ae651d9bb54966b7fd6784a (patch)
treeb41cf9d8c654b88f5a3b064c028991ad8c5daf82 /board/avionic-design
parent7c3f386d0c125f1fdb84a88329e396ed0ff66ab4 (diff)
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tegra: Enable LCD on TEC
The TEC ships with a 7" LCD panel that provides a resolution of 800x480 pixels. Add a corresponding panel description to the device tree and enable LCD support in the configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/avionic-design')
-rw-r--r--board/avionic-design/dts/tegra20-tec.dts32
1 files changed, 32 insertions, 0 deletions
diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts
index 50ea3b51e4..cdb752776c 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -24,6 +24,19 @@
};
};
+ host1x {
+ status = "okay";
+
+ dc@54200000 {
+ status = "okay";
+
+ rgb {
+ nvidia,panel = <&lcd_panel>;
+ status = "okay";
+ };
+ };
+ };
+
clock@60006000 {
clocks = <&clk_32k &osc>;
};
@@ -66,4 +79,23 @@
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
+
+ lcd_panel: panel {
+ clock = <33260000>;
+ xres = <800>;
+ yres = <480>;
+ left-margin = <120>;
+ right-margin = <120>;
+ hsync-len = <16>;
+ lower-margin = <15>;
+ upper-margin = <15>;
+ vsync-len = <15>;
+
+ nvidia,bits-per-pixel = <16>;
+ nvidia,pwm = <&pwm 0 500000>;
+ nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */
+ nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
+ nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
+ nvidia,panel-timings = <0 0 0 0>;
+ };
};