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| author | Dave Liu <daveliu@freescale.com> | 2008-10-28 17:53:38 +0800 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-03 22:44:48 -0600 |
| commit | 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 (patch) | |
| tree | 5f36c4042cbf9b782a025e446c56d2db8f182db4 /board/atum8548 | |
| parent | 2077e348c2a84901022ad95311b47b70361e6daa (diff) | |
| download | u-boot-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.gz u-boot-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.xz u-boot-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.zip | |
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/atum8548')
| -rw-r--r-- | board/atum8548/atum8548.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 226ef57eee..6ef663eeb0 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -37,10 +37,6 @@ #include <libfdt.h> #include <fdt_support.h> -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int board_early_init_f (void) @@ -117,12 +113,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } |