summaryrefslogtreecommitdiffstats
path: root/board/armltd
diff options
context:
space:
mode:
authorRyan Harkin <ryan.harkin@linaro.org>2013-04-09 02:20:30 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-05-23 11:22:39 +0200
commit9b58a3f606e46cb335d44458e53a37d9b221f785 (patch)
tree38a62f81daaae9dc6a658b6cc2cfb87827a44ef6 /board/armltd
parent5ba444f092ae9f68a0bd1f53956be2e69d26cf61 (diff)
downloadu-boot-9b58a3f606e46cb335d44458e53a37d9b221f785.tar.gz
u-boot-9b58a3f606e46cb335d44458e53a37d9b221f785.tar.xz
u-boot-9b58a3f606e46cb335d44458e53a37d9b221f785.zip
ARM: vexpress: refactoring of Versatile Express CA9x4 support
The current ca9x4_ct_vxp platform contains support for a Versatile Express motherboard with a quad core A9 core tile. This patch separates the Versatile Express motherboard code and the A9 specific code, to ease supporting more core tiles in the next patches. Andre: merged the first two of Ryan's original patches and did some checkpatch fixes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Diffstat (limited to 'board/armltd')
-rw-r--r--board/armltd/vexpress/Makefile2
-rw-r--r--board/armltd/vexpress/vexpress_common.c (renamed from board/armltd/vexpress/ca9x4_ct_vxp.c)6
2 files changed, 4 insertions, 4 deletions
diff --git a/board/armltd/vexpress/Makefile b/board/armltd/vexpress/Makefile
index 87495901fe..6719f3d446 100644
--- a/board/armltd/vexpress/Makefile
+++ b/board/armltd/vexpress/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
-COBJS := ca9x4_ct_vxp.o
+COBJS := vexpress_common.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/vexpress_common.c
index d5e109ec06..c4f2520a3b 100644
--- a/board/armltd/vexpress/ca9x4_ct_vxp.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -166,8 +166,8 @@ static void vexpress_timer_init(void)
*/
writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
- writel(SYSTIMER_EN | SYSTIMER_32BIT | \
- readl(&systimer_base->timer0control), \
+ writel(SYSTIMER_EN | SYSTIMER_32BIT |
+ readl(&systimer_base->timer0control),
&systimer_base->timer0control);
reset_timer_masked();
@@ -251,7 +251,7 @@ unsigned long long get_ticks(void)
return get_timer(0);
}
-ulong get_tbclk (void)
+ulong get_tbclk(void)
{
return (ulong)CONFIG_SYS_HZ;
}