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authorHannes Schmelzer <oe5hpm@oevsv.at>2018-01-09 19:01:35 +0100
committerAnatolij Gustschin <agust@denx.de>2018-01-11 15:19:51 +0100
commit0fcec5775207353fd7ffcdeaad7f490d9a56be2c (patch)
treec9f35d1346eb957e89ecabff7216d6209faaf079 /board/BuR/common
parent8a094f508c4576626cdcc1b5a7513066180cd798 (diff)
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board/BuR: provide real clock-frequency instead a divider
Actual am335x-fb implementation takes now a real clock frequency instead a divider. So this component doesn't need to know anymore some base frequency of the LCDC, we simply provide the pixel-clock frequency. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'board/BuR/common')
-rw-r--r--board/BuR/common/common.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index c1cd010023..d82b8cdfe2 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -139,13 +139,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len");
pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay");
pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay");
-
- /* calc. proper clk-divisor */
- dtbprop = FDTPROP(PATHTIM, "clock-frequency");
- if (dtbprop != ~0UL)
- pnltmp.pxl_clk_div = 192000000 / dtbprop;
- else
- pnltmp.pxl_clk_div = ~0UL;
+ pnltmp.pxl_clk = FDTPROP(PATHTIM, "clock-frequency");
/* check polarity of control-signals */
dtbprop = FDTPROP(PATHTIM, "hsync-active");
@@ -195,7 +189,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
- pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL);
+ pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL);
pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
@@ -211,7 +205,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
~0UL == (pnltmp.vfp) ||
~0UL == (pnltmp.vbp) ||
~0UL == (pnltmp.vsw) ||
- ~0UL == (pnltmp.pxl_clk_div) ||
+ ~0UL == (pnltmp.pxl_clk) ||
~0UL == (pnltmp.pol) ||
~0UL == (pnltmp.pup_delay) ||
~0UL == (pnltmp.pon_delay)
@@ -234,7 +228,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
- pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
+ pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay);
return -1;
}