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authorMarek Vasut <marex@denx.de>2015-07-12 15:11:03 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:08 +0200
commitef84861b7d3a78c0ba5754e592f5b08026ffbdd1 (patch)
tree98a499c3fe1040343942c5c6e0d76d843179c494 /arch
parent066ad14a22b10b444ed9e89401f6d905164774b0 (diff)
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arm: socfpga: misc: Fix warm reset
Write necessary magic value into the Warm Boot from ON-Chip RAM group Enable register to enable Warm reset support. Instead of doing this in the reset_cpu() function, we do it in arch early init to avoid breaking old kernel code which expects this magic value to be already written into this register. This magic is originally excavated from common/spl/spl.c in the u-boot port from altera, where this value was written just before the SPL jumped to actual U-Boot in the RAM. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-socfpga/misc.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index e3fa92f2e2..a6ff793c73 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -194,6 +194,16 @@ static uint32_t iswgrp_handoff[8];
int arch_early_init_r(void)
{
int i;
+
+ /*
+ * Write magic value into magic register to unlock support for
+ * issuing warm reset. The ancient kernel code expects this
+ * value to be written into the register by the bootloader, so
+ * to support that old code, we write it here instead of in the
+ * reset_cpu() function just before reseting the CPU.
+ */
+ writel(0xae9efebc, &sysmgr_regs->romcodegrp_warmramgrp_enable);
+
for (i = 0; i < 8; i++) /* Cache initial SW setting regs */
iswgrp_handoff[i] = readl(&sysmgr_regs->iswgrp_handoff[i]);