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| author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-16 17:27:05 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
| commit | ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26 (patch) | |
| tree | 8f8d68058f52b3f4c45af86fd7e24f477efb9bc9 /arch | |
| parent | b713e0291ba90847058678ae2752f08f238c8fe3 (diff) | |
| download | u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.tar.gz u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.tar.xz u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.zip | |
ram: rk3399: Add ddrtimingC0
Add DdrTimingC0 structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/sdram_rk3399.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h index 471702f935..7f41a67242 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h @@ -18,6 +18,16 @@ struct rk3399_ddr_pi_regs { u32 denali_pi[200]; }; +union noc_ddrtimingc0 { + u32 d32; + struct { + unsigned burstpenalty : 4; + unsigned reserved0 : 4; + unsigned wrtomwr : 6; + unsigned reserved1 : 18; + } b; +}; + struct rk3399_msch_regs { u32 coreid; u32 revisionid; @@ -36,7 +46,7 @@ struct rk3399_msch_regs { struct rk3399_msch_timings { u32 ddrtiminga0; u32 ddrtimingb0; - u32 ddrtimingc0; + union noc_ddrtimingc0 ddrtimingc0; u32 devtodev0; u32 ddrmode; u32 agingx0; |