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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2018-07-09 15:17:20 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-20 15:55:05 -0400 |
| commit | d090cbab64c893e6c6122e468282750aeeeae840 (patch) | |
| tree | e7c763d35e75bcd7b5d82c6fce964924c8c51566 /arch | |
| parent | a674313c2cebfad8e168a2011027470a2e640983 (diff) | |
| download | u-boot-d090cbab64c893e6c6122e468282750aeeeae840.tar.gz u-boot-d090cbab64c893e6c6122e468282750aeeeae840.tar.xz u-boot-d090cbab64c893e6c6122e468282750aeeeae840.zip | |
misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.
We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-stm32mp/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 898ad6bd37..7c04905775 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -29,6 +29,7 @@ config TARGET_STM32MP1 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select PINCTRL_STM32 + select STM32_RCC select STM32_RESET select SYS_ARCH_TIMER select SYSRESET_SYSCON |