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| author | Michal Simek <michal.simek@xilinx.com> | 2021-03-09 12:43:42 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-05-19 09:44:50 +0200 |
| commit | a34a12fabc2558535643df6c98a73d52d25001fd (patch) | |
| tree | 5ea700f23a602aa8ec20203c9a2234db2528fab8 /arch | |
| parent | 428bec7cf956c3558bbdfda4d2ba23beb73a68ba (diff) | |
| download | u-boot-a34a12fabc2558535643df6c98a73d52d25001fd.tar.gz u-boot-a34a12fabc2558535643df6c98a73d52d25001fd.tar.xz u-boot-a34a12fabc2558535643df6c98a73d52d25001fd.zip | |
arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodes
All si570 which are used for ps reference clock generation should contain
silabs,skip-recall property not to cause break on ps clock.
On Versal boards this will cause hang on Versal cpu when it is booted at
the same time with SC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 1 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 3 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 3 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 3 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 1 |
5 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index aae3c626f5..135c83f502 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -475,6 +475,7 @@ factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "ref_clk"; + silabs,skip-recall; }; /* and connector J212D */ }; diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index 19e1ebdb1d..213149a3dc 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -343,9 +343,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index 46ec427648..c458110e5a 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -349,9 +349,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 6eb58e6701..cee7ca1fa9 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -339,9 +339,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 4f7824ae40..8e1e6b7f90 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -390,6 +390,7 @@ factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "ref_clk"; + silabs,skip-recall; }; /* Connection via Samtec J212D */ /* Use for storing information about X-PRC card */ |