diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-08-29 17:04:20 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-09-10 16:19:03 +0800 |
| commit | 980fe1ab2ad6a449639928d7a7e9c0aadb41a495 (patch) | |
| tree | ba95f22ec3aaf6a44cdef8e8c011ec8da1340d48 /arch | |
| parent | 0c6352ec2a238c1f89b0f394b34da57ab0849f6a (diff) | |
| download | u-boot-980fe1ab2ad6a449639928d7a7e9c0aadb41a495.tar.gz u-boot-980fe1ab2ad6a449639928d7a7e9c0aadb41a495.tar.xz u-boot-980fe1ab2ad6a449639928d7a7e9c0aadb41a495.zip | |
x86: tangier: Fix off-by-one error when preparing CSRT
Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.
Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/tangier/acpi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 362e133cf1..8b128138b0 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -95,7 +95,7 @@ static u32 acpi_fill_csrt_dma(struct acpi_csrt_group *grp) si->dma_address_width = 32; si->base_request_line = 0; si->num_handshake_signals = 16; - si->max_block_size = 0x20000; + si->max_block_size = 0x1ffff; return grp->length; } |