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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2021-02-04 10:11:45 +0100 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2021-02-10 10:00:51 +0100 |
| commit | 8bc780106c1399bd263c4283a8747889a613ca5d (patch) | |
| tree | 05440dc6f2ede4f716735962d2ed62507c402324 /arch | |
| parent | 4547551aa019698524e809f81f65d5782f62bc1d (diff) | |
| download | u-boot-8bc780106c1399bd263c4283a8747889a613ca5d.tar.gz u-boot-8bc780106c1399bd263c4283a8747889a613ca5d.tar.xz u-boot-8bc780106c1399bd263c4283a8747889a613ca5d.zip | |
board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants
Use the ADC channel 1 to check the hardware revision of the board and
detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use
different dtb file, so adjust fdtfile environment variable to the
detected variant.
The ADC min/max values for each variant are taken from the vendor code,
adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit
mode).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi b/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi index 236f2468dc..a92f9e9ff1 100644 --- a/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi +++ b/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi @@ -5,3 +5,9 @@ */ #include "meson-g12-common-u-boot.dtsi" + +/* SARADC is needed for proper board variant detection */ +&saradc { + status = "okay"; + vref-supply = <&vddao_1v8>; +}; diff --git a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi index fbcc8287c5..963bf96b25 100644 --- a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi +++ b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi @@ -12,6 +12,12 @@ snps,reset-active-low; }; +/* SARADC is needed for proper board variant detection */ +&saradc { + status = "okay"; + vref-supply = <&vddao_1v8>; +}; + &tflash_vdd { gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; }; |