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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-03-16 17:20:47 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-04-06 16:30:37 -0400 |
| commit | 872807b1e57aa0f376d8fd35ea548a8befa8945b (patch) | |
| tree | de1a668629590e363031ae77854425c3dc7eb678 /arch | |
| parent | b1d62424cb83f2b96337deec1cf9dcbe19a45b95 (diff) | |
| download | u-boot-872807b1e57aa0f376d8fd35ea548a8befa8945b.tar.gz u-boot-872807b1e57aa0f376d8fd35ea548a8befa8945b.tar.xz u-boot-872807b1e57aa0f376d8fd35ea548a8befa8945b.zip | |
powerpc: mpc8xx: initialisation of initial RAM
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc
This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xx/start.S | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 202ea81ae4..62ac80b03b 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -130,12 +130,6 @@ in_flash: /* initialize some SPRs that are hard to access from C */ /*----------------------------------------------------------------------*/ - lis r3, CONFIG_SYS_IMMR@h /* pass IMMR as arg1 to C routine */ - ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */ - /* Note: R0 is still 0 here */ - stwu r0, -4(r1) /* clear final stack frame so that */ - stwu r0, -4(r1) /* stack backtraces terminate cleanly */ - /* * Disable serialized ifetch and show cycles * (i.e. set processor to normal mode). @@ -151,6 +145,25 @@ in_flash: ori r2, r2, CONFIG_SYS_DER@l mtspr DER, r2 + /* set up the stack in internal DPRAM */ + lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + addi r1, r3, -8 + + bl board_init_f_alloc_reserve + addi r1, r3, -8 + + /* Zeroise the CPM dpram */ + lis r4, CONFIG_SYS_IMMR@h + ori r4, r4, (0x2000 - 4) + li r0, (0x2000 / 4) + mtctr r0 + li r0, 0 +1: stwu r0, 4(r4) + bdnz 1b + + bl board_init_f_init_reserve + /* let the C-code set up the rest */ /* */ /* Be careful to keep code relocatable ! */ @@ -158,7 +171,7 @@ in_flash: GET_GOT /* initialize GOT access */ - /* r3: IMMR */ + lis r3, CONFIG_SYS_IMMR@h bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f /* run 1st part of board init code (from Flash) */ |