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| author | Michal Simek <michal.simek@xilinx.com> | 2018-04-19 15:43:50 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-05-11 09:23:43 +0200 |
| commit | 767afebbcda59f3ccb04f6c94de8cab2fb7905b6 (patch) | |
| tree | d543258f2c260387559b5e81ce4095f575ed0f91 /arch | |
| parent | 4490e013ee4f2a4b9b6ca9224221fed2788b6940 (diff) | |
| download | u-boot-767afebbcda59f3ccb04f6c94de8cab2fb7905b6.tar.gz u-boot-767afebbcda59f3ccb04f6c94de8cab2fb7905b6.tar.xz u-boot-767afebbcda59f3ccb04f6c94de8cab2fb7905b6.zip | |
arm64: zynqmp: Enable cadence WDT for zcu100
Enable watchdog on zcu100 to make sure if there is a bug in the u-boot
there is proper reset.
Watchdog expires and PMU fw is informed and based on setting proper
action is taken.
The patch is enabling reset-on-timeout feature and also fixing fixed
clock rate for watchdog where 100MHz is max (and also default) clock value.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynqmp-clk.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-zcu100-revC.dts | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index a8664e8187..a795efdc15 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -219,7 +219,7 @@ }; &watchdog0 { - clocks = <&clk250>; + clocks = <&clk100>; }; &xilinx_drm { diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 9114f98140..bcd9c3958f 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -332,6 +332,7 @@ &watchdog0 { status = "okay"; + reset-on-timeout; }; &xilinx_ams { |