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authorPeng Fan <peng.fan@nxp.com>2019-04-17 09:41:16 +0000
committerStefano Babic <sbabic@denx.de>2019-04-25 19:16:24 +0200
commit702339bdf463a5af6f6839a3c495e003750ab309 (patch)
tree30be85dc0425b49837cf2f91eb95ef09631e5f32 /arch
parent3b9ac5415084eadbd34a9d4d94e23d9935e73bd4 (diff)
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imx: i.MX8MQ: clear ocotp error bit
In case ocotp error bit is set, clear it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 11251c5f9a..7ec39b3e47 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -169,6 +169,7 @@ static void imx_set_wdog_powerdown(bool enable)
int arch_cpu_init(void)
{
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
/*
* Init timer at very early state, because sscg pll setting
* will use it
@@ -180,6 +181,12 @@ int arch_cpu_init(void)
imx_set_wdog_powerdown(false);
}
+ if (is_imx8mq()) {
+ clock_enable(CCGR_OCOTP, 1);
+ if (readl(&ocotp->ctrl) & 0x200)
+ writel(0x200, &ocotp->ctrl_clr);
+ }
+
return 0;
}