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| author | Marek Vasut <marex@denx.de> | 2019-11-20 22:34:30 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-11-25 13:12:55 +0100 |
| commit | 446cf811c58733c4b68149a0b83f4a258e1719ba (patch) | |
| tree | f7f80304d0b8cf9567c399231f0278d07c457872 /arch | |
| parent | 9a0cbae22a613dfd55e15565785749b74c19fdf0 (diff) | |
| download | u-boot-446cf811c58733c4b68149a0b83f4a258e1719ba.tar.gz u-boot-446cf811c58733c4b68149a0b83f4a258e1719ba.tar.xz u-boot-446cf811c58733c4b68149a0b83f4a258e1719ba.zip | |
ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable
On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register,
which releases all bridges from reset, instead of putting all bridges
into reset. Fix this by inverting the mask and actually putting the
bridges into reset.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-socfpga/misc_gen5.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 31681b799d..36f00aee31 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -231,7 +231,7 @@ void do_bridge_reset(int enable, unsigned int mask) } else { writel(0, &sysmgr_regs->fpgaintfgrp_module); writel(0, &sdr_ctrl->fpgaport_rst); - writel(0, &reset_manager_base->brg_mod_reset); + writel(0x7, &reset_manager_base->brg_mod_reset); writel(1, &nic301_regs->remap); } } |