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authorSimon Glass <sjg@chromium.org>2020-09-19 18:49:29 -0600
committerSimon Glass <sjg@chromium.org>2020-10-06 09:07:54 -0600
commit4c1497e77661eea47d3dbb9bee029532cc0da198 (patch)
tree74370564fedab53ab0b2dfc367acd80a836b87de /arch/x86
parent751b7c79634003b4cb326b79e80202ea45b75fc8 (diff)
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bloblist: Allow custom alignment for blobs
Some blobs need a larger alignment than the default. For example, ACPI tables often start at a 4KB boundary. Add support for this. Update the size of the test blob to allow these larger records. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/intel_common/acpi.c2
-rw-r--r--arch/x86/cpu/intel_common/intel_opregion.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/cpu/intel_common/acpi.c b/arch/x86/cpu/intel_common/acpi.c
index a4d5fbd38a..4496bbfd99 100644
--- a/arch/x86/cpu/intel_common/acpi.c
+++ b/arch/x86/cpu/intel_common/acpi.c
@@ -198,7 +198,7 @@ int southbridge_inject_dsdt(const struct udevice *dev, struct acpi_ctx *ctx)
struct acpi_global_nvs *gnvs;
int ret;
- ret = bloblist_ensure_size(BLOBLISTT_ACPI_GNVS, sizeof(*gnvs),
+ ret = bloblist_ensure_size(BLOBLISTT_ACPI_GNVS, sizeof(*gnvs), 0,
(void **)&gnvs);
if (ret)
return log_msg_ret("bloblist", ret);
diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c
index 4e6c64d9aa..c95ae04992 100644
--- a/arch/x86/cpu/intel_common/intel_opregion.c
+++ b/arch/x86/cpu/intel_common/intel_opregion.c
@@ -108,7 +108,7 @@ int intel_gma_init_igd_opregion(struct udevice *dev,
struct optionrom_vbt *ext_vbt;
ret = bloblist_ensure_size(BLOBLISTT_INTEL_VBT,
- vbt->hdr_vbt_size,
+ vbt->hdr_vbt_size, 0,
(void **)&ext_vbt);
if (ret) {
log_err("GMA: Unable to add Ext VBT to bloblist\n");