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| author | Miao Yan <yanmiaobest@gmail.com> | 2015-07-27 19:16:07 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-05 08:42:38 -0600 |
| commit | 417576c2f1f2c5392cd69ef3ed33668cc9900e6e (patch) | |
| tree | 6888f7074c19e8bee629877c3d359de082a03830 /arch/x86/lib | |
| parent | 947eb4396dfe11e89f0d3cafe755b395c6c0a8a2 (diff) | |
| download | u-boot-417576c2f1f2c5392cd69ef3ed33668cc9900e6e.tar.gz u-boot-417576c2f1f2c5392cd69ef3ed33668cc9900e6e.tar.xz u-boot-417576c2f1f2c5392cd69ef3ed33668cc9900e6e.zip | |
x86: Add a 'pause' instruction in __udelay() for QEMU target
When running SMP configuration on QEMU (tcg mode, no kvm), there is
a busy loop in start_aps(), calling udelay(), that waits for APs to
show up online. However, there is a chance that VCPU1 will be timeout
waiting, IOW the secondary VCPUs haven't started their execution yet.
This patch adds a 'pause' instruction in __udelay() only for QEMU
target, to give other VCPUs a chance to run. When QEMU sees the
'pause' instruction, it will yeild the execution to other CPUs.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib')
| -rw-r--r-- | arch/x86/lib/tsc_timer.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c index 7f5ba2ca6f..0df1af238c 100644 --- a/arch/x86/lib/tsc_timer.c +++ b/arch/x86/lib/tsc_timer.c @@ -355,7 +355,15 @@ void __udelay(unsigned long usec) stop = now + usec * get_tbclk_mhz(); while ((int64_t)(stop - get_ticks()) > 0) +#if defined(CONFIG_QEMU) && defined(CONFIG_SMP) + /* + * Add a 'pause' instruction on qemu target, + * to give other VCPUs a chance to run. + */ + asm volatile("pause"); +#else ; +#endif } int timer_init(void) |