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authorSimon Glass <sjg@chromium.org>2015-03-05 12:25:15 -0700
committerSimon Glass <sjg@chromium.org>2015-04-16 19:27:41 -0600
commit31f57c28736d9a070fe56c55d57e9da406ee86ba (patch)
tree9d3d2bacb65e48e1ac21ec1c08f852f9f04936c2 /arch/x86/lib/bios_interrupts.c
parent5f7bfdd63094689af501fdef77423e0029c06622 (diff)
downloadu-boot-31f57c28736d9a070fe56c55d57e9da406ee86ba.tar.gz
u-boot-31f57c28736d9a070fe56c55d57e9da406ee86ba.tar.xz
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x86: Add a x86_ prefix to the x86-specific PCI functions
These functions currently use a generic name, but they are for x86 only. This may introduce confusion and prevents U-Boot from using these names more widely. In fact it should be possible to remove these at some point and use generic functions, but for now, rename them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/lib/bios_interrupts.c')
-rw-r--r--arch/x86/lib/bios_interrupts.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
index b0e2ecbbca..290990a8bd 100644
--- a/arch/x86/lib/bios_interrupts.c
+++ b/arch/x86/lib/bios_interrupts.c
@@ -172,28 +172,28 @@ int int1a_handler(void)
}
switch (func) {
case 0xb108: /* Read Config Byte */
- byte = pci_read_config8(dev, reg);
+ byte = x86_pci_read_config8(dev, reg);
M.x86.R_ECX = byte;
break;
case 0xb109: /* Read Config Word */
- word = pci_read_config16(dev, reg);
+ word = x86_pci_read_config16(dev, reg);
M.x86.R_ECX = word;
break;
case 0xb10a: /* Read Config Dword */
- dword = pci_read_config32(dev, reg);
+ dword = x86_pci_read_config32(dev, reg);
M.x86.R_ECX = dword;
break;
case 0xb10b: /* Write Config Byte */
byte = M.x86.R_ECX;
- pci_write_config8(dev, reg, byte);
+ x86_pci_write_config8(dev, reg, byte);
break;
case 0xb10c: /* Write Config Word */
word = M.x86.R_ECX;
- pci_write_config16(dev, reg, word);
+ x86_pci_write_config16(dev, reg, word);
break;
case 0xb10d: /* Write Config Dword */
dword = M.x86.R_ECX;
- pci_write_config32(dev, reg, dword);
+ x86_pci_write_config32(dev, reg, dword);
break;
}