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| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-02-10 10:16:21 +0000 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-04-12 10:54:27 +0530 |
| commit | 51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72 (patch) | |
| tree | 54dcf22335201f4fd69199261a02ef644387fb9d /arch/x86/dts/chromebook_link.dts | |
| parent | ffd4c7c2ecb745586239eb98d5dc0fe5e6ebe3bd (diff) | |
| download | u-boot-51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72.tar.gz u-boot-51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72.tar.xz u-boot-51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72.zip | |
x86: dts: switch spi-flash to jedec, spi-nor compatible
The x86 code and DT uses "spi-flash" to detect a flash node, switch to
"jedec,spi-nor" in the DTS files and in fdtdec by switching the
GENERIC_SPI_FLASH value to to jedec,spi-nor.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/x86/dts/chromebook_link.dts')
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index c5653feac7..09488f13b5 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -429,7 +429,7 @@ u-boot,dm-pre-reloc; reg = <0>; compatible = "winbond,w25q64", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; |