diff options
| author | Simon Glass <sjg@chromium.org> | 2020-05-27 06:58:46 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-06-02 09:16:13 +0800 |
| commit | 8e2922e357fe0157593063d46f8e9bd2c25a00e0 (patch) | |
| tree | a78b84536befe740edd09f48417996a74d99d6b8 /arch/x86/cpu/intel_common | |
| parent | 9452b7496f8b85ca3bdda1014495df1a6235a8de (diff) | |
| download | u-boot-8e2922e357fe0157593063d46f8e9bd2c25a00e0.tar.gz u-boot-8e2922e357fe0157593063d46f8e9bd2c25a00e0.tar.xz u-boot-8e2922e357fe0157593063d46f8e9bd2c25a00e0.zip | |
x86: spi: Add a way to access the SPI mapping via registers
At present the PCI BDF (bus/device/function) is needed to access the SPI
mapping, since the registers are at BAR0. This doesn't work when PCI
auto-config has not been done yet, since BARs are unassigned.
Add another way to find the mapping, using the MMIO base, if the caller
knows this.
Also add a missing function comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/intel_common')
| -rw-r--r-- | arch/x86/cpu/intel_common/fast_spi.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c index a6e3d0a5bf..5d3944dee2 100644 --- a/arch/x86/cpu/intel_common/fast_spi.c +++ b/arch/x86/cpu/intel_common/fast_spi.c @@ -31,21 +31,30 @@ static ulong fast_spi_get_bios_region(struct fast_spi_regs *regs, return bios_start; } +int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep, + uint *map_sizep, uint *offsetp) +{ + ulong base; + + base = fast_spi_get_bios_region(regs, map_sizep); + *map_basep = (u32)-*map_sizep - base; + *offsetp = base; + + return 0; +} + int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep, uint *offsetp) { struct fast_spi_regs *regs; - ulong bar, base, mmio_base; + ulong bar, mmio_base; /* Special case to find mapping without probing the device */ pci_x86_read_config(pdev, PCI_BASE_ADDRESS_0, &bar, PCI_SIZE_32); mmio_base = bar & PCI_BASE_ADDRESS_MEM_MASK; regs = (struct fast_spi_regs *)mmio_base; - base = fast_spi_get_bios_region(regs, map_sizep); - *map_basep = (u32)-*map_sizep - base; - *offsetp = base; - return 0; + return fast_spi_get_bios_mmap_regs(regs, map_basep, map_sizep, offsetp); } int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base) |