summaryrefslogtreecommitdiffstats
path: root/arch/x86/cpu/intel_common
diff options
context:
space:
mode:
authorIvan Gorinov <ivan.gorinov@intel.com>2018-06-21 21:16:16 -0700
committerBin Meng <bmeng.cn@gmail.com>2018-07-02 09:23:28 +0800
commit8199a145c40791f0bc272fc016494028cf250195 (patch)
tree10fb5e497fe4545b0a60cd083bda855b0b03801c /arch/x86/cpu/intel_common
parentfc48ebe6dff059a799c8f85e31ee8dea6c2f77d8 (diff)
downloadu-boot-8199a145c40791f0bc272fc016494028cf250195.tar.gz
u-boot-8199a145c40791f0bc272fc016494028cf250195.tar.xz
u-boot-8199a145c40791f0bc272fc016494028cf250195.zip
x86: Use microcode update from device tree for all processors
Built without a ROM image with FSP (u-boot.rom), the U-Boot loader applies the microcode update data block encoded in Device Tree to the bootstrap processor but not passed to the other CPUs when multiprocessing is enabled. If the bootstrap processor successfully performs a microcode update from Device Tree, use the same data block for the other processors. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed build errors on edison and qemu-x86] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/intel_common')
-rw-r--r--arch/x86/cpu/intel_common/car.S2
-rw-r--r--arch/x86/cpu/intel_common/microcode.c10
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S
index fe8dfbc9ca..52a77bb2d1 100644
--- a/arch/x86/cpu/intel_common/car.S
+++ b/arch/x86/cpu/intel_common/car.S
@@ -239,4 +239,6 @@ _dt_ucode_base_size:
.globl ucode_base
ucode_base: /* Declared in microcode.h */
.long 0 /* microcode base */
+.globl ucode_size
+ucode_size: /* Declared in microcode.h */
.long 0 /* microcode size */
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c
index 11b1ec8955..c7a539d281 100644
--- a/arch/x86/cpu/intel_common/microcode.c
+++ b/arch/x86/cpu/intel_common/microcode.c
@@ -43,8 +43,6 @@ static int microcode_decode_node(const void *blob, int node,
update->data = fdt_getprop(blob, node, "data", &update->size);
if (!update->data)
return -ENOENT;
- update->data += UCODE_HEADER_LEN;
- update->size -= UCODE_HEADER_LEN;
update->header_version = fdtdec_get_int(blob, node,
"intel,header-version", 0);
@@ -124,6 +122,7 @@ static void microcode_read_cpu(struct microcode_update *cpu)
int microcode_update_intel(void)
{
struct microcode_update cpu, update;
+ ulong address;
const void *blob = gd->fdt_blob;
int skipped;
int count;
@@ -167,7 +166,8 @@ int microcode_update_intel(void)
skipped++;
continue;
}
- wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
+ address = (ulong)update.data + UCODE_HEADER_LEN;
+ wrmsr(MSR_IA32_UCODE_WRITE, address, 0);
rev = microcode_read_rev();
debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
rev, update.date_code & 0xffff,
@@ -178,5 +178,9 @@ int microcode_update_intel(void)
return -EFAULT;
}
count++;
+ if (!ucode_base) {
+ ucode_base = (ulong)update.data;
+ ucode_size = update.size;
+ }
} while (1);
}