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author | Simon Glass <sjg@chromium.org> | 2016-03-11 22:06:53 -0700 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:24 +0800 |
commit | 1223d737a38dab7f05e7d62a3c931e28aa1e1495 (patch) | |
tree | 060f7cdd1fdfd59d2de13c3154c23066be7a2704 /arch/x86/cpu/intel_common/Makefile | |
parent | 342727ace6fd3dd5c96bb9342eabe96614ed208a (diff) | |
download | u-boot-1223d737a38dab7f05e7d62a3c931e28aa1e1495.tar.gz u-boot-1223d737a38dab7f05e7d62a3c931e28aa1e1495.tar.xz u-boot-1223d737a38dab7f05e7d62a3c931e28aa1e1495.zip |
x86: Move cache-as-RAM code into a common location
This cache-as-RAM (CAR) code is common to several Intel chips. Create a new
intel_common directory and move it in there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/intel_common/Makefile')
-rw-r--r-- | arch/x86/cpu/intel_common/Makefile | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile new file mode 100644 index 0000000000..5dd95739a0 --- /dev/null +++ b/arch/x86/cpu/intel_common/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2016 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_HAVE_MRC) += car.o |