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| author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:56:39 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:57:47 +0800 |
| commit | f6d00da459694a42c1de1e42b159595e2f5ad56f (patch) | |
| tree | efa0ef73ce868ce3c99a3d35f1cc2fbfafd2906f /arch/x86/cpu/broadwell/cpu_full.c | |
| parent | 2f0c2f03e71a68d7e5d8770c10d0154ead6dd104 (diff) | |
| download | u-boot-f6d00da459694a42c1de1e42b159595e2f5ad56f.tar.gz u-boot-f6d00da459694a42c1de1e42b159595e2f5ad56f.tar.xz u-boot-f6d00da459694a42c1de1e42b159595e2f5ad56f.zip | |
x86: Tidy up some duplicate MSR defines
Some MSR registers are defined twice in different parts of the file. Move
them together and remove the duplicates. Also drop some thermal defines
which are not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/broadwell/cpu_full.c')
| -rw-r--r-- | arch/x86/cpu/broadwell/cpu_full.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 169b5b02a6..895edeb4bc 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -470,9 +470,9 @@ static void configure_misc(void) msr_t msr; msr = msr_read(MSR_IA32_MISC_ENABLE); - msr.lo |= (1 << 0); /* Fast String enable */ - msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ - msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ + msr.lo |= MISC_ENABLE_FAST_STRING; + msr.lo |= MISC_ENABLE_TM1; + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; msr_write(MSR_IA32_MISC_ENABLE, msr); /* Disable thermal interrupts */ |