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authorMario Six <six@gdsys.cc>2018-02-12 08:05:57 +0100
committerSimon Glass <sjg@chromium.org>2018-02-18 15:53:48 -0700
commitc6b89f31806df06a5d7b688a65f9d2e6e6119a55 (patch)
treec672045c9190eba8774a37aa2e14b0e6102bb12e /arch/sandbox
parent995b60b5937133639500d89a01da0d88af3cff15 (diff)
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sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/sandbox')
-rw-r--r--arch/sandbox/Kconfig16
-rw-r--r--arch/sandbox/cpu/cpu.c2
-rw-r--r--arch/sandbox/dts/Makefile4
-rw-r--r--arch/sandbox/dts/sandbox64.dts317
-rw-r--r--arch/sandbox/include/asm/io.h6
-rw-r--r--arch/sandbox/include/asm/types.h17
6 files changed, 352 insertions, 10 deletions
diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
index 87418e3986..2a08533c4b 100644
--- a/arch/sandbox/Kconfig
+++ b/arch/sandbox/Kconfig
@@ -10,6 +10,11 @@ config SYS_BOARD
config SYS_CPU
default "sandbox"
+config SANDBOX64
+ bool "Use 64-bit addresses"
+ select PHYS_64BIT
+ select HOST_64BIT
+
config SANDBOX_SPL
bool "Enable SPL for sandbox"
select SUPPORT_SPL
@@ -20,24 +25,25 @@ config SYS_CONFIG_NAME
choice
prompt "Run sandbox on 32/64-bit host"
- default SANDBOX_64BIT
+ default HOST_64BIT
help
Sandbox can be built on 32-bit and 64-bit hosts.
The default is to build on a 64-bit host and run
on a 64-bit host. If you want to run sandbox on
a 32-bit host, change it here.
-config SANDBOX_32BIT
+config HOST_32BIT
bool "32-bit host"
+ depends on !PHYS_64BIT
-config SANDBOX_64BIT
+config HOST_64BIT
bool "64-bit host"
endchoice
config SANDBOX_BITS_PER_LONG
int
- default 32 if SANDBOX_32BIT
- default 64 if SANDBOX_64BIT
+ default 32 if HOST_32BIT
+ default 64 if HOST_64BIT
endmenu
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 66c3a6a88a..4a20fde787 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -76,7 +76,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
if (plen != len) {
printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
- __func__, paddr, len, plen);
+ __func__, (uint)paddr, len, plen);
}
map_len = len;
return ptr;
diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile
index 0197569262..861b4dc2b1 100644
--- a/arch/sandbox/dts/Makefile
+++ b/arch/sandbox/dts/Makefile
@@ -2,7 +2,11 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SANDBOX64
+dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
+else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
+endif
dtb-$(CONFIG_UT_DM) += test.dtb
targets += $(dtb-y)
diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
new file mode 100644
index 0000000000..d6efc011de
--- /dev/null
+++ b/arch/sandbox/dts/sandbox64.dts
@@ -0,0 +1,317 @@
+/dts-v1/;
+
+#define USB_CLASS_HUB 9
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "sandbox";
+
+ aliases {
+ eth5 = "/eth@90000000";
+ i2c0 = &i2c_0;
+ pci0 = &pci;
+ rtc0 = &rtc_0;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ cros_ec: cros-ec@0 {
+ reg = <0 0 0 0>;
+ compatible = "google,cros-ec-sandbox";
+
+ /*
+ * This describes the flash memory within the EC. Note
+ * that the STM32L flash erases to 0, not 0xff.
+ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ flash@8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* Information for sandbox */
+ ro {
+ reg = <0 0xf000>;
+ };
+ wp-ro {
+ reg = <0xf000 0x1000>;
+ };
+ rw {
+ reg = <0x10000 0x10000>;
+ };
+ };
+ };
+
+ eth@10002000 {
+ compatible = "sandbox,eth";
+ reg = <0x0 0x10002000 0x0 0x1000>;
+ fake-host-hwaddr = [00 00 66 44 22 00];
+ };
+
+ eth@80000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x80000000 0x0 0x1000>;
+ host-raw-interface = "eth0";
+ };
+
+ eth@90000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x90000000 0x0 0x1000>;
+ host-raw-interface = "lo";
+ };
+
+ gpio_a: gpios@0 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <1>;
+ gpio-bank-name = "a";
+ sandbox,gpio-count = <20>;
+ };
+
+ gpio_b: gpios@1 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <2>;
+ gpio-bank-name = "b";
+ sandbox,gpio-count = <10>;
+ };
+
+ hexagon {
+ compatible = "demo-simple";
+ colour = "white";
+ sides = <6>;
+ };
+
+ i2c_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,i2c";
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ eeprom@2c {
+ reg = <0x2c>;
+ compatible = "i2c-eeprom";
+ emul {
+ compatible = "sandbox,i2c-eeprom";
+ sandbox,filename = "i2c.bin";
+ sandbox,size = <128>;
+ };
+ };
+
+ rtc_0: rtc@43 {
+ reg = <0x43>;
+ compatible = "sandbox-rtc";
+ emul {
+ compatible = "sandbox,i2c-rtc";
+ };
+ };
+ sandbox_pmic: sandbox_pmic {
+ reg = <0x40>;
+ };
+ };
+
+ lcd {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,lcd-sdl";
+ xres = <1366>;
+ yres = <768>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ iracibble {
+ gpios = <&gpio_a 1 0>;
+ label = "sandbox:red";
+ };
+
+ martinet {
+ gpios = <&gpio_a 2 0>;
+ label = "sandbox:green";
+ };
+ };
+
+ pci: pci-controller {
+ compatible = "sandbox,pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
+ 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
+ pci@1f,0 {
+ compatible = "pci-generic";
+ reg = <0xf800 0 0 0 0>;
+ emul@1f,0 {
+ compatible = "sandbox,swap-case";
+ };
+ };
+ };
+
+ pinctrl {
+ compatible = "sandbox,pinctrl";
+
+ pinctrl_i2c0: i2c0 {
+ groups = "i2c";
+ function = "i2c";
+ bias-pull-up;
+ };
+
+ pinctrl_serial0: uart0 {
+ groups = "serial_a";
+ function = "serial";
+ };
+ };
+
+ reset@1 {
+ compatible = "sandbox,reset";
+ };
+
+ spi@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,spi";
+ cs-gpios = <0>, <&gpio_a 0>;
+ firmware_storage_spi: flash@0 {
+ reg = <0>;
+ compatible = "spansion,m25p16", "sandbox,spi-flash";
+ spi-max-frequency = <40000000>;
+ sandbox,filename = "spi.bin";
+ };
+ };
+
+ spl-test {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ boolval;
+ intval = <1>;
+ intarray = <2 3 4>;
+ byteval = [05];
+ bytearray = [06];
+ longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11];
+ stringval = "message";
+ stringarray = "multi-word", "message";
+ };
+
+ spl-test2 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ intval = <3>;
+ intarray = <5>;
+ byteval = [08];
+ bytearray = [01 23 34];
+ longbytearray = [09 0a 0b 0c];
+ stringval = "message2";
+ stringarray = "another", "multi-word", "message";
+ };
+
+ spl-test3 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ stringarray = "one";
+ };
+
+ spl-test4 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test.2";
+ };
+
+ square {
+ compatible = "demo-shape";
+ colour = "blue";
+ sides = <4>;
+ };
+
+ timer {
+ compatible = "sandbox,timer";
+ clock-frequency = <1000000>;
+ };
+
+ tpm {
+ compatible = "google,sandbox-tpm";
+ };
+
+ triangle {
+ compatible = "demo-shape";
+ colour = "cyan";
+ sides = <3>;
+ character = <83>;
+ light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
+ };
+
+ /* Needs to be available prior to relocation */
+ uart0: serial {
+ compatible = "sandbox,serial";
+ sandbox,text-colour = "cyan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial0>;
+ };
+
+ usb@0 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ hub {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ };
+ };
+ };
+
+ usb@1 {
+ compatible = "sandbox,usb";
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ hub-emul {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ sandbox,filepath = "flash.bin";
+ };
+ };
+ };
+ };
+
+ usb@2 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ };
+
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
+};
+
+#include "cros-ec-keyboard.dtsi"
+#include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index d3e8b969d6..1a0a772adc 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -43,9 +43,15 @@ phys_addr_t map_to_sysmem(const void *ptr);
#define readb(addr) ((void)addr, 0)
#define readw(addr) ((void)addr, 0)
#define readl(addr) ((void)addr, 0)
+#ifdef CONFIG_SANDBOX64
+#define readq(addr) ((void)addr, 0)
+#endif
#define writeb(v, addr) ((void)addr)
#define writew(v, addr) ((void)addr)
#define writel(v, addr) ((void)addr)
+#ifdef CONFIG_SANDBOX64
+#define writeq(v, addr) ((void)addr)
+#endif
/*
* Clear and set bits in one shot. These macros can be used to clear and
diff --git a/arch/sandbox/include/asm/types.h b/arch/sandbox/include/asm/types.h
index 623cdafefa..6657f3a7b9 100644
--- a/arch/sandbox/include/asm/types.h
+++ b/arch/sandbox/include/asm/types.h
@@ -51,14 +51,23 @@ typedef __UINT64_TYPE__ u64;
#endif
/*
- * Number of bits in a C 'long' on this architecture. Set this to 32 when
- * building on a 32-bit machine.
+ * Number of bits in a C 'long' on this architecture.
*/
-#define BITS_PER_LONG 32
-
+#ifdef CONFIG_PHYS64
+#define BITS_PER_LONG 64
+#else /* CONFIG_PHYS64 */
+#define BITS_PER_LONG 32
+#endif /* CONFIG_PHYS64 */
+
+#ifdef CONFIG_PHYS64
+typedef unsigned long long dma_addr_t;
+typedef u64 phys_addr_t;
+typedef u64 phys_size_t;
+#else /* CONFIG_PHYS64 */
typedef unsigned long dma_addr_t;
typedef u32 phys_addr_t;
typedef u32 phys_size_t;
+#endif /* CONFIG_PHYS64 */
#endif /* __KERNEL__ */