diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2018-09-26 06:55:17 -0700 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2018-10-03 17:48:14 +0800 |
| commit | b5369c5813aa407139fc137ccbd0944190f15ebc (patch) | |
| tree | a344c53febb288b4e740dce7cc70c3efa91580fc /arch/riscv | |
| parent | ed49ba4dcccb21cee1c32427cf5bbf09521cd8dd (diff) | |
| download | u-boot-b5369c5813aa407139fc137ccbd0944190f15ebc.tar.gz u-boot-b5369c5813aa407139fc137ccbd0944190f15ebc.tar.xz u-boot-b5369c5813aa407139fc137ccbd0944190f15ebc.zip | |
riscv: Make start.S available for all targets
Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/ax25/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/start.S (renamed from arch/riscv/cpu/ax25/start.S) | 0 | ||||
| -rw-r--r-- | arch/riscv/cpu/u-boot.lds | 2 |
5 files changed, 4 insertions, 4 deletions
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index af432e16ff..8fb6a889d8 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -3,7 +3,7 @@ # Copyright (C) 2017 Andes Technology Corporation. # Rick Chen, Andes Technology Corporation <rick@andestech.com> -head-y := arch/riscv/cpu/$(CPU)/start.o +head-y := arch/riscv/cpu/start.o libs-y += arch/riscv/cpu/ libs-y += arch/riscv/cpu/$(CPU)/ diff --git a/arch/riscv/cpu/Makefile b/arch/riscv/cpu/Makefile index 63de163e3f..2cc6757fcf 100644 --- a/arch/riscv/cpu/Makefile +++ b/arch/riscv/cpu/Makefile @@ -2,4 +2,6 @@ # # Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> +extra-y = start.o + obj-y += cpu.o diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Makefile index c3f164c122..2ab0342fe8 100644 --- a/arch/riscv/cpu/ax25/Makefile +++ b/arch/riscv/cpu/ax25/Makefile @@ -3,6 +3,4 @@ # Copyright (C) 2017 Andes Technology Corporation # Rick Chen, Andes Technology Corporation <rick@andestech.com> -extra-y = start.o - obj-y := cpu.o diff --git a/arch/riscv/cpu/ax25/start.S b/arch/riscv/cpu/start.S index 7cd7755190..7cd7755190 100644 --- a/arch/riscv/cpu/ax25/start.S +++ b/arch/riscv/cpu/start.S diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds index f414473e54..11bc4a738b 100644 --- a/arch/riscv/cpu/u-boot.lds +++ b/arch/riscv/cpu/u-boot.lds @@ -11,7 +11,7 @@ SECTIONS { . = ALIGN(4); .text : { - arch/riscv/cpu/ax25/start.o (.text) + arch/riscv/cpu/start.o (.text) } /* This needs to come before *(.text*) */ |