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authorBin Meng <bmeng.cn@gmail.com>2018-12-12 06:12:33 -0800
committerAndes <uboot@andestech.com>2018-12-18 09:56:27 +0800
commit92b64fef0580fab1c86bede68451270dc3772857 (patch)
treee7b3676f0afaa612ceae900d73866ec19cfd9d72 /arch/riscv
parent84304d4866c8d69cd1ddb4b5c6cbcc17d6708da0 (diff)
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riscv: Enlarge the default SYS_MALLOC_F_LEN
Increase the heap size for the pre-relocation stage, so that CPU driver can be loaded. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 39ca2d829c..c45e4d73a8 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -113,4 +113,7 @@ config RISCV_RDTIME
standard rdtime instruction. This is the case for S-mode U-Boot, and
is useful for processors that support rdtime in M-mode too.
+config SYS_MALLOC_F_LEN
+ default 0x1000
+
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