diff options
author | Patrice Chotard <patrice.chotard@st.com> | 2020-11-06 08:11:57 +0100 |
---|---|---|
committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-11-25 10:29:23 +0100 |
commit | 63185b0a32442fe36fda3f6cb5b29d186085f179 (patch) | |
tree | 92cf69aa787619fb48a3f5d75717557c20aadbc0 /arch/riscv | |
parent | d361eafe82bfbf90ab0a592ae59daef99faee5ec (diff) | |
download | u-boot-63185b0a32442fe36fda3f6cb5b29d186085f179.tar.gz u-boot-63185b0a32442fe36fda3f6cb5b29d186085f179.tar.xz u-boot-63185b0a32442fe36fda3f6cb5b29d186085f179.zip |
ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.
This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:
memory {
device_type = "memory";
reg = <0x00 0x00>;
};
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch/riscv')
0 files changed, 0 insertions, 0 deletions