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| author | Rick Chen <rick@andestech.com> | 2019-04-02 15:56:39 +0800 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-04-08 09:45:08 +0800 |
| commit | 0d389468e2144f3ba3bdbc566c05c0c05dc14fc6 (patch) | |
| tree | b48b25b552a66db5d7e92dd23bdacf82484ddd41 /arch/riscv/lib/Makefile | |
| parent | d0a8fd3e4d2a5ab19b8f2d27d40dacb4942ba5a4 (diff) | |
| download | u-boot-0d389468e2144f3ba3bdbc566c05c0c05dc14fc6.tar.gz u-boot-0d389468e2144f3ba3bdbc566c05c0c05dc14fc6.tar.xz u-boot-0d389468e2144f3ba3bdbc566c05c0c05dc14fc6.zip | |
riscv: Add a SYSCON driver for Andestech's PLIC
The Platform-Level Interrupt Controller (PLIC)
block holds memory-mapped claim and pending registers
associated with software interrupt. It is required
for handling IPI.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'arch/riscv/lib/Makefile')
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 35dbf643e4..1bf554bad5 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-$(CONFIG_RISCV_RDTIME) += rdtime.o obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o +obj-$(CONFIG_ANDES_PLIC) += andes_plic.o obj-y += interrupts.o obj-y += reset.o obj-$(CONFIG_SBI_IPI) += sbi_ipi.o |