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author | Anup Patel <Anup.Patel@wdc.com> | 2019-02-25 08:14:24 +0000 |
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committer | Andes <uboot@andestech.com> | 2019-02-27 09:12:33 +0800 |
commit | 1fa625b8e4b299560e3d3f705e0ea9efc01187ad (patch) | |
tree | 79795a06b9fd1e5a485bfb9064ac107551b50246 /arch/riscv/include | |
parent | 70b8562dcf03461cd01bcacab7520c7d1485176c (diff) | |
download | u-boot-1fa625b8e4b299560e3d3f705e0ea9efc01187ad.tar.gz u-boot-1fa625b8e4b299560e3d3f705e0ea9efc01187ad.tar.xz u-boot-1fa625b8e4b299560e3d3f705e0ea9efc01187ad.zip |
riscv: Add place-holder asm/arch/clk.h for driver compilation
Some of the drivers (such as Cadence MACB ethernet driver) expect
asm/arch/clk.h to be provided by arch support so we add place-holder
asm/arch-generic/clk.h for RISC-V generic CPU.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'arch/riscv/include')
-rw-r--r-- | arch/riscv/include/asm/arch-generic/clk.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-generic/clk.h b/arch/riscv/include/asm/arch-generic/clk.h new file mode 100644 index 0000000000..1631f5f0bd --- /dev/null +++ b/arch/riscv/include/asm/arch-generic/clk.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + */ + +#ifndef __ASM_RISCV_ARCH_CLK_H +#define __ASM_RISCV_ARCH_CLK_H + +/* Note: This is a placeholder header for driver compilation. */ + +#endif |