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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-03-16 17:20:41 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-04-06 16:30:37 -0400 |
| commit | ee1e600c13d16febd517ab7d0d2c243db174789b (patch) | |
| tree | f9d2374d1e226ee815fc3388931bb46b818f6450 /arch/powerpc/include/asm/cache.h | |
| parent | 0ebb5388b4aff65934730cc187826919c8f33a25 (diff) | |
| download | u-boot-ee1e600c13d16febd517ab7d0d2c243db174789b.tar.gz u-boot-ee1e600c13d16febd517ab7d0d2c243db174789b.tar.xz u-boot-ee1e600c13d16febd517ab7d0d2c243db174789b.zip | |
powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Diffstat (limited to 'arch/powerpc/include/asm/cache.h')
| -rw-r--r-- | arch/powerpc/include/asm/cache.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index 0801d2c367..445a366807 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -7,7 +7,7 @@ #include <asm/processor.h> /* bytes per L1 cache line */ -#if defined(CONFIG_8xx) +#if defined(CONFIG_MPC8xx) #define L1_CACHE_SHIFT 4 #elif defined(CONFIG_PPC64BRIDGE) #define L1_CACHE_SHIFT 7 @@ -72,7 +72,7 @@ void disable_cpc_sram(void); #define L2CACHE_NONE 0x03 /* NONE */ #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */ -#ifdef CONFIG_8xx +#ifdef CONFIG_MPC8xx /* Cache control on the MPC8xx is provided through some additional * special purpose registers. */ @@ -139,6 +139,6 @@ static inline void wr_dc_adr(uint val) mtspr(DC_ADR, val); } #endif -#endif /* CONFIG_8xx */ +#endif /* CONFIG_MPC8xx */ #endif |