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author | Andy Fleming <afleming@freescale.com> | 2013-06-17 15:10:28 -0500 |
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committer | Andy Fleming <afleming@freescale.com> | 2013-06-20 13:51:04 -0500 |
commit | 7dd09b546d11722284d48ade55d0f800ee3cff75 (patch) | |
tree | f683d3e78a313c1f7b9a90f267086a5db831ca30 /arch/powerpc/cpu/mpc85xx | |
parent | 7315cfd9e1922ee1c3c5f016e5a3b16199122172 (diff) | |
download | u-boot-7dd09b546d11722284d48ade55d0f800ee3cff75.tar.gz u-boot-7dd09b546d11722284d48ade55d0f800ee3cff75.tar.xz u-boot-7dd09b546d11722284d48ade55d0f800ee3cff75.zip |
85xx: Change clock-frequency compatible to 2.0
Accidentally applied an earlier version of the patch, which set
the compatible to "fsl,qoriq-clockgen-2", lacking the final
".0".
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 288f7b2860..bb95f3d500 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -663,7 +663,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); - do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2", + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); do_fixup_by_compat_u32(blob, "fsl,mpic", "clock-frequency", get_bus_freq(0)/2, 1); |